INTERTON VC 4000 CODING GUIDE ----------------------------- This document was written on 7/2/07, and last updated on 23/1/22, by James Jacobs of Amigan Software. Information herein is believed to be generally accurate, though most is tentative and incomplete. If you have anything to contribute, please email amigansoftware@gmail.com. Thanks to Manfred Schneider and Peter Trauner for their contributions. Disassembly, comprehension and patching can be done in the same way as described in the Emerson Arcadia 2001 Coding Guide. Some available disassemblies were made using older versions of ANNOTATE; the memory maps included in such disassemblies are obsolete and inaccurate. Memory Maps ----------- "Motherboard RAM" is RAM that is built into the console unit. "Cartridge RAM" is additional RAM that is provided onboard certain game cartridges. "PVI RAM" is motherboard RAM in the $1Fxx area. There are four different cartridge configurations known: A: 2K ROM/EPROM + 0K RAM (most games): $0000..$07FF: game ROM/EPROM (2K) $0800..$15FF: unused $1600..$17FF: mirror of $1E00..$1FFF $1800..$1DFF: unused $1E00..$1EFF: "I/O area" $1F00..$1FFF: PVI area $2000..$3FFF: mirror of $0000..$1FFF $4000..$5FFF: mirror of $0000..$1FFF $6000..$7FFF: mirror of $0000..$1FFF B: 4K ROM/EPROM + 0K RAM (some games): $0000..$0FFF: game ROM/EPROM (4K) $1000..$15FF: unused $1600..$17FF: mirror of $1E00..$1FFF $1800..$1DFF: unused $1E00..$1EFF: "I/O area" $1F00..$1FFF: PVI area $2000..$3FFF: mirror of $0000..$1FFF $4000..$5FFF: mirror of $0000..$1FFF $6000..$7FFF: mirror of $0000..$1FFF C: 4K ROM + 1K RAM (Backgammon, Chess 1 and Draughts only): $0000..$0FFF: game ROM (4K) $1000..$13FF: 1K of cartridge RAM $1400..$15FF: mirror of $1000..$11FF $1600..$17FF: mirror of $1E00..$1FFF $1800..$1DFF: mirror of $1000..$15FF $1E00..$1EFF: "I/O area" $1F00..$1FFF: PVI area $2000..$3FFF: mirror of $0000..$1FFF $4000..$5FFF: mirror of $0000..$1FFF $6000..$7FFF: mirror of $0000..$1FFF D: 6K ROM + 1K RAM (Chess 2 only): $0000..$15FF: game ROM (6K ROM chip, but only 5�K is usable) $1600..$17FF: mirror of $1E00..$1FFF (obscures 512 bytes of ROM) $1800..$1BFF: 1K of cartridge RAM $1C00..$1DFF: mirror of $1800..$19FF $1E00..$1EFF: "I/O area" $1F00..$1FFF: PVI area $2000..$3FFF: mirror of $0000..$1FFF $4000..$5FFF: mirror of $0000..$1FFF $6000..$7FFF: mirror of $0000..$1FFF ;Hardware Equates/Memory Map (Interton VC 4000)--------------------------- ; $0000..$07FF: (R/-) A-D: ROM ; $0800..$08BF: (-/-) A: unused ; (R/-) B-D: ROM ; $08C0..$0FFF: (-/-) A: unused ; (R/-) B-D: ROM ; $1000..$13FF: (-/-) A-B: unused ; (R/W) C: 1K of cartridge RAM ; (R/-) D: ROM ; $1400..$15FF: (-/-) A-B: unused ; (R/W) C: mirror of $1000..$11FF ; (R/-) D: ROM ; $1600..$17FF: (*/*) A-D: mirror of $1E00..$1FFF ; $1800..$1BFF: (-/-) A-B: unused ; (R/W) C: mirror of $1000..$13FF ; (R/W) D: 1K of cartridge RAM ; $1C00..$1DFF: (-/-) A-B: unused ; (R/W) C: mirror of $1400..$15FF ; (R/W) D: mirror of $1800..$19FF ; $1E00..$1E7F: (-/-) unused NOISE equ $1E80 ;(?/W) noise register ; bits 7..6: volume: ; %00 = high (full?) ; %01 = medium high (3/4?) ; %10 = medium low (2/4?) ; %11 = low (1/4?) ; bit 5: bright backgrounds on/off ; bit 4: start explosion (>= 20 msec) ; bit 3: noise on/off ; bit 2: PVI tone on/off ; bits 1..0: unmapped ; $1E81..$1E87: (-/-) unmapped P1LEFTKEYS equ $1E88 ;(R/-) ; bit 7: p1 (left) '1' button ; bit 6: p1 (left) '4' button ; bit 5: p1 (left) '7' button ; bit 4: p1 (left) 'C' button (Clear) ; bits 3..0: unused P1MIDDLEKEYS equ $1E89 ;(R/-) ; bit 7: p1 (left) '2' button ; bit 6: p1 (left) '5' button ; bit 5: p1 (left) '8' button ; bit 4: p1 (left) '0' button ; bits 3..0: unused P1RIGHTKEYS equ $1E8A ;(R/-) ; bit 7: p1 (left) '3' button ; bit 6: p1 (left) '6' button ; bit 5: p1 (left) '9' button ; bit 4: p1 (left) 'E' button (Enter) ; bits 3..0: unused CONSOLE equ $1E8B ;(R/-) ; bit 7: 'SELECT' button ; bit 6: 'START' button ; bits 5..0: unused P2LEFTKEYS equ $1E8C ;(R/-) ; bit 7: p2 (right) '1' button ; bit 6: p2 (right) '4' button ; bit 5: p2 (right) '7' button ; bit 4: p2 (right) 'C' button (Clear) ; bits 3..0: unused P2MIDDLEKEYS equ $1E8D ;(R/-) ; bit 7: p2 (right) '2' button ; bit 6: p2 (right) '5' button ; bit 5: p2 (right) '8' button ; bit 4: p2 (right) '0' button ; bits 3..0: unused P2RIGHTKEYS equ $1E8E ;(R/-) ; bit 7: p2 (right) '3' button ; bit 6: p2 (right) '6' button ; bit 5: p2 (right) '9' button ; bit 4: p2 (right) 'E' button (Enter) ; bits 3..0: unused ; $1E8F..$1E97 (-/-) unmapped ; $1E98..$1E9B (R/-) mirror of $1E88..$1E8B ; $1E9C..$1EA7 (-/-) unmapped ; $1EA8..$1EAE (R/-) mirror of $1E88..$1E8E ; $1EAF..$1EB7 (-/-) unmapped ; $1EB8..$1EBB (R/-) mirror of $1E88..$1E8B ; $1EBC..$1EC7 (-/-) unmapped ; $1EC8..$1ECE (R/-) mirror of $1E88..$1E8E ; $1ECF..$1ED7 (-/-) unmapped ; $1ED8..$1EDB (R/-) mirror of $1E88..$1E8B ; $1EDC..$1EE7 (-/-) unmapped ; $1EE8..$1EEE (R/-) mirror of $1E88..$1E8E ; $1EEF..$1EF7 (-/-) unmapped ; $1EF8..$1EFB (R/-) mirror of $1E88..$18EB ; $1EFC..$1EFF (-/-) unmapped ; $1F00..$1F09: (R/W) imagery for sprite #0 (8*10) SPRITE0AX equ $1F0A ;(R/W) SPRITE0BX equ $1F0B ;(R/W) SPRITE0AY equ $1F0C ;(R/W) SPRITE0BY equ $1F0D ;(R/W) ; $1F0E..$1F0F: (R/W) PVI RAM ; $1F10..$1F19: (R/W) imagery for sprite #1 (8*10) SPRITE1AX equ $1F1A ;(R/W) SPRITE1BX equ $1F1B ;(R/W) SPRITE1AY equ $1F1C ;(R/W) SPRITE1BY equ $1F1D ;(R/W) ; $1F1E..$1F1F: (R/W) PVI RAM ; $1F20..$1F29: (R/W) imagery for sprite #2 (8*10) SPRITE2AX equ $1F2A ;(R/W) SPRITE2BX equ $1F2B ;(R/W) SPRITE2AY equ $1F2C ;(R/W) SPRITE2BY equ $1F2D ;(R/W) ; $1F2E..$1F3F: (-/-) unmapped ; $1F40..$1F49: (R/W) imagery for sprite #3 (8*10) SPRITE3AX equ $1F4A ;(R/W) SPRITE3BX equ $1F4B ;(R/W) SPRITE3AY equ $1F4C ;(R/W) SPRITE3BY equ $1F4D ;(R/W) ; $1F4E..$1F6D: (R/W) PVI RAM ; $1F6E..$1F7F: (-/-) unmapped ; $1F80..$1FA7 ;(R/W) vertical grid HORIZ1 equ $1FA8 ;(R/W) horizontal grid #1 HORIZ2 equ $1FA9 ;(R/W) horizontal grid #2 HORIZ3 equ $1FAA ;(R/W) horizontal grid #3 HORIZ4 equ $1FAB ;(R/W) horizontal grid #4 HORIZ5 equ $1FAC ;(R/W) horizontal grid #5 ; $1FAD: (R/W) PVI RAM ; $1FAE..$1FBF: (-/-) unmapped SIZES equ $1FC0 ;(-/W) ; bits 7..6: sprite #3 size (%00..%11) ; bits 5..4: sprite #2 size (%00..%11) ; bits 3..2: sprite #1 size (%00..%11) ; bits 1..0: sprite #0 size (%00..%11) SPR01COLOURS equ $1FC1 ;(-/W) ; bits 7..6: unused ; bits 5..3: colour of sprite #0 ; (inverted RGB mask) ; bits 2..0: colour of sprite #1 ; (inverted RGB mask) SPR23COLOURS equ $1FC2 ;(-/W) ; bits 7..6: unused ; bits 5..3: colour of sprite #2 ; (inverted RGB mask) ; bits 2..0: colour of sprite #3 ; (inverted RGB mask) SCORECTRL equ $1FC3 ;(-/W) ; bits 7..2: unused ; bit 1: score format ; 0 = 2 groups of 2 digits ; 1 = 1 group of 4 digits ; bit 0: score position ; 0 = top of screen ; 1 = bottom of screen ; $1FC4..$1FC5: (-/-) unused BGCOLOUR equ $1FC6 ;(-/W) ; bit 7: unused ; bits 6..4: grid colour (normal RGB HB mask) ; bit 3: grid/background enable flag ; (0=off, 1=on) ; bits 2..0: screen colour (normal RGB HB ; mask) (black if bit 3 is clear) PITCH equ $1FC7 ;(-/W) ; bits 7..0: pitch SCORELT equ $1FC8 ;(-/W) left digit pair ; bits 7..4: BCD value of 1st digit ; bits 3..0: BCD value of 2nd digit SCORERT equ $1FC9 ;(-/W) right digit pair ; bits 7..4: BCD value of 3rd digit ; bits 3..0: BCD value of 4th digit BGCOLLIDE equ $1FCA ;(R/-) read-once! ; bit 7: sprite #0 collision with bkgrnd ; bit 6: sprite #1 collision with bkgrnd ; bit 5: sprite #2 collision with bkgrnd ; bit 4: sprite #3 collision with bkgrnd ; bit 3: sprite #0 display complete ; bit 2: sprite #1 display complete ; bit 1: sprite #2 display complete ; bit 0: sprite #3 display complete SPRITECOLLIDE equ $1FCB ;(R/-) read-once! ; bit 7: unused ; bit 6: vertical reset flag ; bit 5: sprites #0/#1 collision ; bit 4: sprites #0/#2 collision ; bit 3: sprites #0/#3 collision ; bit 2: sprites #1/#2 collision ; bit 1: sprites #1/#3 collision ; bit 0: sprites #2/#3 collision P1PADDLE equ $1FCC ;(R/-) cleared at VRST P2PADDLE equ $1FCD ;(R/-) cleared at VRST ; $1FCE..$1FCF ;(-/-) unused ; $1FD0..$1FDF: (*/*) semi-mirror of $1FC0..$1FCF ; $1FE0..$1FEF: (*/*) semi-mirror of $1FC0..$1FCF ; $1FF0..$1FFF: (*/*) semi-mirror of $1FC0..$1FCF ; $2000..$3FFF: (*/*) mirror of $0000..$1FFF ; $4000..$5FFF: (*/*) mirror of $0000..$1FFF ; $6000..$7FFF: (*/*) mirror of $0000..$1FFF R/W: read/write R/-: read-only (write attempts are ignored) -/-: unmapped -/W: write-only */*: mirror (or semi-mirror) (resolve address to ascertain R/W attributes) HB = halfbrite Also, some addresses are read-once (as noted in the text). Note that writes to $1E80..$1EFF affect the NOISE register ($1E80). Reads within this range are handled as shown above. (This applies to both Interton and Elektor.) Vertical and horizontal grid registers are of course usable as ordinary user RAM by games which do not use the grid (such games do not set the "grid/background enable" flag in BGCOLOUR, or set the grid colour to be the same as the screen (background) colour). "The object descriptor areas and background definition range can also be read at all times in the normal way. In the I/O and control section, however, reading data causes that location to be reset to $00." - 2636 PVI datasheet. The Flag pin of the PSU (in the 2650 CPU) controls the paddle interpolation (ie. whether horizontal or vertical). Semi-mirroring: See the Elektor TV Games Computer Coding Guide. Interton BIN Format ------------------- Interton-family BINs are quite straightforward; the size can be up to 6K and these are loaded directly into the corresponding address ($0000..$17FF). The only issue is the fact that the last 512 bytes ($1600..$17FF) is a mirror of $1E00..$1FFF and therefore obscures access to that part of the ROM, limiting the usable size to 5.5K. Since games are not able to be any larger you don't need to worry about CPU page issues because you will only be using the first page anyway. Display Frame ------------- There are two standards in use for measuring 2650 instruction timings. Instructions take 6-18 (or more) short/fast cycles ("clock periods" in the official manual). Instructions take 2-6 (or more) long/slow cycles ("cycles" in the official manual). 3 short/fast cycles = 1 long/slow cycle. 4 clock pulses (X-pixels) of the PVI = 1 "fast" cycle of the CPU. 12 clock pulses (X-pixels) of the PVI = 1 "slow" cycle of the CPU. 12 clock pulses (X-pixels) of the PVI = 3 "fast" cycles of the CPU. There are 56.75 (227/4 ) short/fast cycles per rastline (disregarding bus contention). There are 18.91667 (227/4/3) long /slow cycles per rastline (disregarding bus contention). X-axis ("grid" section): 16 character 'columns', each of 8 pixels (each digit requires 2 columns) = 128 pixels. Y-axis ("grid" section): 10 character 'rows', each of 20 pixels = 200 pixels. The top left corner of the grid section is at 81,63 in 2621 (PAL) USG coordinates, or 81,40 in 2622 (NTSC) USG coordinates, or 32,20 in 2636 PVI coordinates. The PVI datasheet is wrong to imply that the last raster in which imagery is displayable is 251 (p. 6), ie. 252 visible rasters. Experimental results (eg. Elektor TESTER1) show that at least 268 rasters are visible (for PAL, of course). All ranges shown are inclusive. See also the "Comparative Tables" section of http://amigan.yatho.com/s-coding.txt . NTSC Timing ----------- The oscillator in the NTSC Emerson Arcadia 2001 (at least) is clocked at 3,579,545 +/- ? Hz. The CPU runs at exactly a quarter of this rate (ideally 894,886.25 Hz). If we do only 60 FPS, we draw only 3,568,440 pixels per second (227 * 262 * 60), and thus we emulate only 892,110 CPU cycles (227 * 262 * 60 / 4). Whereas: 3,579,545 pixels per second / 4 pixels per cycle = 894,886.25 cycles per second. Each NTSC frame actually only lasts for about 16,615.2 msec, according to the measured 2622 USG output. Which means the FPS of the real machine would be actually 60.185854. This lines up closely with the theory, as follows: 227 X-pixels per row * 262 Y-pixels per column = 59,474 pixels per frame. 59,474 pixels per frame / 4 pixels per cycle = 14,868.5 cycles per frame. 3,579,545 pixels per second / 59,474 pixels per frame = 60.1867202475031 frames per second. 1 second / 60.1867202475031 frames per second = 16,614.960839995 usecs per frame. At 60 FPS: 60 frames * 262 rows per frame = 15,720 rows per second. 60 frames * 14,868.5 cycles per frame = 892,110 cycles per second. Each NTSC frame takes 1/ 60 sec (1 sec / 60 frames = 16.6' ms). Each NTSC row takes 1/ 15,720 sec (1 sec / 60 frames / 262 rows = 63.6132315521628 us). Each NTSC pixel takes 1/3,568,440 sec (1 sec / 60 frames / 262 rows / 227 columns = 280.234500229792 ns). At 60.1867202475031 FPS: 60.1867202475031 frames * 262 rows per frame = 15,768.9207048458 rows per second. 60.1867202475031 frames * 14,868.5 cycles per frame = 894,886.25 cycles per second. Each NTSC frame takes 1/ 60.1867202475031 sec (1 sec / 60.1867202475031 frames = 16.614960839995 ms). Each NTSC row takes 1/ 15,720 sec (1 sec / 60.1867202475031 frames / 262 rows = 63.4158810686833 us). Each NTSC pixel takes 1/3,568,440 sec (1 sec / 60.1867202475031 frames / 262 rows / 227 columns = 279.365114840015 ns). 2622 USG horizontal timings are: There are 227 horizontal pixels, numbered 0..226. Horizontal blank is pixels 10.. 48 ( 39 pixels), non-blank is 49..226 and 0..9 (188 pixels). Front porch is pixels 10.. 14 ( 5 pixels) (beam blanked, moving slowly right). Horizontal sync pulse is pixels 15.. 31 ( 17 pixels) (beam blanked, moving quickly left). Back porch is pixels 32.. 48 ( 17 pixels) (beam blanked, moving slowly right), as follows: Front of back porch is pixels 32.. 33 ( 2 pixels). Colour burst is pixels 34.. 42 ( 9 pixels). Back of back porch is pixels 43.. 48 ( 6 pixels). Normal scan is pixels 49.. 9 (188 pixels) (beam unblanked, moving slowly right), as follows: pixels 49..226 (178 pixels). + pixels 0.. 9 ( 10 pixels). It takes a duration of 210 "X-pixels" (columns) to do all our right movement per line (slowly). It takes a duration of 17 "X-pixels" (columns) to do all our left movement per line (quickly). 2622 USG vertical timings are: There are 262 vertical pixels, numbered 1..262. Raster 262 is aka raster 0. Vertical blank is from pixel 10 (ie. start of hblank) on raster 262 (aka raster 0) to pixel 9 (ie. start of hblank) on raster 20, inclusive. There are 242 non-vblank rows, and 20 vblank rows. The USG generates a single sync pulse (lasting for 227*3=681 X-pixels), known as block sync (rather than a train of long and short pulses, known as commercial sync, which is/was typically used for TV broadcasts). 2622 USG (NTSC) signals are as follows: 0 CSYNC (Composite Sync): high whenever VS equals HS (ie. whenever both are low, or both are high) high during visible area and blanking low during HS low during VS high during HS+VS 1 VRST (Vertical Reset): high from X,Y-pixel 10,1..9,20 (ie. during vertical blank). 2 CBLNK (Composite Blanking): high whenever HRST or VRST (or both) is high. 3 high whenever HRST or VRST (or both) is high, except during CBF. 4 CBF (Colour Burst Flag): high from X-pixel 34..42 (ie. during colour burst). 5 HRST (Horizontal ReSeT): high from X-pixel 10..48 (ie. during horizontal blank). 7 PCK (horizontal Position ClocK): high during the left half of each pixel, low during the right half. 8 OE (Odd/Even line): high during even-numbered rastlines (assuming X >= 23) toggles at X-pixel 23 of each line (ie. midway through horizontal retrace). HS (Horizontal Sync): high from X-pixel 15..31 (ie. during horizontal retrace). VS (Vertical Sync): high from X,Y-pixel 32,3..31,5 (ie. during vertical retrace). 480i (NTSC) is 525 lines: A standard frame is: 240 visible lines. 22.5 vblank lines. 240 visible lines. 22.5 vblank lines. =525 lines, 480 of which are visible and 45 of which are vblank. 240p (NTSC) is 262 lines: A standard frame/field is: 240 visible lines. 22 vblank lines. But the 2622 USG does it like this: 242 visible lines. 20 vblank lines. PAL Timing ---------- The oscillator in the PAL Fountain (at least) is clocked at 3,546,895 +/- 35 Hz. The CPU runs at exactly a quarter of this rate (ideally 886,723.75 Hz). If we do only 50 FPS, we draw only 3,541,200 pixels per second (227 * 312 * 50), and thus we emulate only 885,300 CPU cycles (227 * 312 * 50 / 4). Whereas: 3,546,895 pixels per second / 4 pixels per cycle = 886,723.75 cycles per second. 227 X-pixels per row * 312 Y-pixels per column = 70,824 pixels per frame. 70,824 pixels per frame / 4 pixels per cycle = 17,706 cycles per frame. 3,546,895 pixels per second / 70,824 pixels per frame = 50.0804105952784 frames per second. 886,718.75 cycles per second / 17,706 cycles per frame = 50.0804105952784 frames per second. 1 second / 50.0804105952784 frames per second = 19.967887405745 msecs per frame. At 50 FPS: 50 frames * 312 rows per frame = 15,600 rows per second. 50 frames * 17,706 cycles per frame = 886,723.75 cycles per second. Each PAL frame takes 1/ 50 sec (1 sec / 50 frames = 20 ms). Each PAL row takes 1/ 15,600 sec (1 sec / 50 frames / 312 rows = 64.1025641025641 us). 1/ 15,625 would be an interlaced signal Each PAL pixel takes 1/3,541,200 sec (1 sec / 50 frames / 312 rows / 227 columns = 282.39015023156 ns). At 50.0804105952784 FPS: 50.0804105952784 frames * 312 rows per frame = 15,625.0881057269 rows per second. 50.0804105952784 frames * 17,706 cycles per frame = 886,723.749' cycles per second. Each PAL frame takes 1/ 50.0804105952784 sec (1 sec / 50.0804105952784 frames = 19.967887405745 ms). Each PAL row takes 1/ 15,625.0881057269 sec (1 sec / 50.0804105952784 frames / 312 rows = 63.9996391209777 us). Each PAL pixel takes 1/3,546,895 sec (1 sec / 50.0804105952784 frames / 312 rows / 227 columns = 281.936736215761 ns). 2621 USG horizontal timings are: There are 227 horizontal pixels, numbered 0..226. Horizontal blank is pixels 6.. 48 ( 43 pixels), non-blank is 49..226 and 0..5 (184 pixels). Front porch is pixels 6.. 10 ( 5 pixels) (beam blanked, moving slowly right). Horizontal sync pulse is pixels 11.. 27 ( 17 pixels) (beam blanked, moving quickly left). Back porch is pixels 28.. 48 ( 21 pixels) (beam blanked, moving slowly right), as follows: Front of back porch is pixels 28.. 30 ( 3 pixels). Colour burst is pixels 31.. 39 ( 9 pixels). Back of back porch is pixels 40.. 48 ( 9 pixels). Normal scan is pixels 49.. 5 (184 pixels) (beam unblanked, moving slowly right), as follows: pixels 49..226 (178 pixels). + pixels 0.. 5 ( 6 pixels). It takes a duration of 210 "X-pixels" (columns) to do all our right movement per line (slowly). It takes a duration of 17 "X-pixels" (columns) to do all our left movement per line (quickly). 2621 USG vertical timings are: There are 312 vertical pixels, numbered 1..312. Raster 312 is aka raster 0. Vertical blank is from pixel 6 (ie. start of hblank) on raster 312 (aka raster 0) to pixel 5 (ie. start of hblank) on raster 43, inclusive. There are 269 non-vblank rows, and 43 vblank rows. The USG generates a single sync pulse (lasting for 114+227+227+11=579 X-pixels), known as block sync (rather than a train of long and short pulses, known as commercial sync, which is/was typically used for TV broadcasts). 2621 USG (PAL) signals are as follows: HRST (Horizontal ReSeT): high from X-pixel 6..48 (ie. during horizontal blank). HS (Horizontal Sync): high from X-pixel 11..27 (ie. during horizontal retrace). PCK (horizontal Position ClocK): high during the left half of each pixel, low during the right half. CBF (Colour Burst Flag): high from X-pixel 31..39 (ie. during colour burst). OE (Odd/Even line): toggles at X-pixel 19 of each line (ie. midway through horizontal retrace). VRST (Vertical Reset): high from X,Y-pixel 6,1..5,43 (ie. during vertical blank). VS (Vertical Sync): high from X,Y-pixel 113,12..10,15 (ie. during vertical retrace). CBLNK (Composite Blanking): high whenever HRST or VRST (or both) is high CSYNC (Composite Sync): high whenever VS equals HS (ie. whenever both are low, or both are high) 576i (PAL) is 625 lines: A standard frame is: 288 visible lines. 24.5 vblank lines. 288 visible lines. 24.5 vblank lines. =625 lines, 576 of which are visible and 49 of which are vblank. 288p (PAL) is 312 lines: A standard frame/field is: 288 visible lines. 24 vblank lines. But the 2621 USG does it like this: 269 visible lines. 43 vblank lines. Grid ---- Table of bits controlling which segments are lit (addresses are in hexadecimal): 1F80:7 1F80:6 1F80:5 1F80:4 1F80:3 1F80:2 1F80:1 1F80:0 1F81:7 1F81:6 1F81:5 1F81:4 1F81:3 1F81:2 1F81:1 1F81:0 row 0 set 1 (raster 20) 1F80:7 1F80:6 1F80:5 1F80:4 1F80:3 1F80:2 1F80:1 1F80:0 1F81:7 1F81:6 1F81:5 1F81:4 1F81:3 1F81:2 1F81:1 1F81:0 row 1 set 1 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 2 set 2a 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 3 set 2a 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 4 set 2a 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 5 set 2a 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 6 set 2a 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 7 set 2a 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 8 set 2a 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 9 set 2a 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 10 set 2a 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 11 set 2b 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 12 set 2b 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 13 set 2b 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 14 set 2b 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 15 set 2b 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 16 set 2b 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 17 set 2b 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 18 set 2b 1F82:7 1F82:6 1F82:5 1F82:4 1F82:3 1F82:2 1F82:1 1F82:0 1F83:7 1F83:6 1F83:5 1F83:4 1F83:3 1F83:2 1F83:1 1F83:0 row 19 set 2b : : : 1FA4:7 1FA4:6 1FA4:5 1FA4:4 1FA4:3 1FA4:2 1FA4:1 1FA4:0 1FA5:7 1FA5:6 1FA5:5 1FA5:4 1FA5:3 1FA5:2 1FA5:1 1FA5:0 row 180 set 19 1FA4:7 1FA4:6 1FA4:5 1FA4:4 1FA4:3 1FA4:2 1FA4:1 1FA4:0 1FA5:7 1FA5:6 1FA5:5 1FA5:4 1FA5:3 1FA5:2 1FA5:1 1FA5:0 row 181 set 19 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 182 set 20a 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 183 set 20a 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 184 set 20a 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 185 set 20a 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 186 set 20a 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 187 set 20a 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 188 set 20a 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 189 set 20a 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 190 set 20a 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 191 set 20b 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 192 set 20b 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 193 set 20b 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 194 set 20b 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 195 set 20b 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 196 set 20b 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 197 set 20b 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 198 set 20b 1FA6:7 1FA6:6 1FA6:5 1FA6:4 1FA6:3 1FA6:2 1FA6:1 1FA6:0 1FA7:7 1FA7:6 1FA7:5 1FA7:4 1FA7:3 1FA7:2 1FA7:1 1FA7:0 row 199 set 20b (raster 219) Table of bits controlling segment widths: $1FA8:7..6: %00 or %10 = 1x width for sets 1.. 4 (except where overridden by $1FA8:5..0) %01 = 2x width for sets 1.. 4 (except where overridden by $1FA8:5..0) %11 = 4x width for sets 1.. 4 (except where overridden by $1FA8:5..0) $1FA8:5: %0 = 1x/2x/4x width for set 4b (depending on $1FA8:7..6) %1 = 8x width for set 4b $1FA8:4: %0 = 1x/2x/4x width for set 4a (depending on $1FA8:7..6) %1 = 8x width for set 4a $1FA8:3: %0 = 1x/2x/4x width for set 3 (depending on $1FA8:7..6) %1 = 8x width for set 3 $1FA8:2: %0 = 1x/2x/4x width for set 2b (depending on $1FA8:7..6) %1 = 8x width for set 2b $1FA8:1: %0 = 1x/2x/4x width for set 2a (depending on $1FA8:7..6) %1 = 8x width for set 2a $1FA8:0: %0 = 1x/2x/4x width for set 1 (depending on $1FA8:7..6) %1 = 8x width for set 1 : : : $1FAC:7..6: %00 or %10 = 1x width for sets 17..20 (except where overridden by $1FAC:5..0) %01 = 2x width for sets 17..20 (except where overridden by $1FAC:5..0) %11 = 4x width for sets 17..20 (except where overridden by $1FAC:5..0) $1FAC:5: %0 = 1x/2x/4x width for set 20b (depending on $1FAC:7..6) %1 = 8x width for set 20b $1FAC:4: %0 = 1x/2x/4x width for set 20a (depending on $1FAC:7..6) %1 = 8x width for set 20a $1FAC:3: %0 = 1x/2x/4x width for set 19 (depending on $1FAC:7..6) %1 = 8x width for set 19 $1FAC:2: %0 = 1x/2x/4x width for set 18b (depending on $1FAC:7..6) %1 = 8x width for set 18b $1FAC:1: %0 = 1x/2x/4x width for set 18a (depending on $1FAC:7..6) %1 = 8x width for set 18a $1FAC:0: %0 = 1x/2x/4x width for set 17 (depending on $1FAC:7..6) %1 = 8x width for set 17 Tones ----- Here are the optimal PITCH register values for harmonic melodies, in hexadecimal and decimal notations: PITCH reg Actual NTSC Actual PAL Ideal NTSC Note Ideal PAL Note --------- ----------- ---------- --------------- -------------- $FF (255) 30.75781 30.5176 b0 ( 30.868) $FE (254) 30.87843 30.6373 B0 ( 30.868) $FD (253) 31.00000 30.7579 b0 ( 30.868) $FC (252) 31.12253 30.8794 b0 ( 30.868) B0 ( 30.868) $FB (251) 31.24603 31.0020 b0 ( 30.868) $FA (250) 31.37052 31.1255 b0 ( 30.868) $F9 (249) 31.49600 31.2500 b0 ( 30.868) $F8 (248) 31.62249 31.3755 b0 ( 30.868) $F7 (247) 31.75000 31.5020 c1 ( 32.703) $F6 (246) 31.87854 31.6296 c1 ( 32.703) $F5 (245) 32.00813 31.7581 c1 ( 32.703) $F4 (244) 32.13877 31.8878 c1 ( 32.703) $F3 (243) 32.27049 32.0184 c1 ( 32.703) $F2 (242) 32.40329 32.1502 c1 ( 32.703) $F1 (241) 32.53719 32.2831 c1 ( 32.703) $F0 (240) 32.67220 32.4170 C1 ( 32.703) $EF (239) 32.80833 32.5521 c1 ( 32.703) $EE (238) 32.94561 32.6883 c1 ( 32.703) C1 ( 32.703) $ED (237) 33.08403 32.8256 c1 ( 32.703) $EC (236) 33.22363 32.9641 c1 ( 32.703) $EB (235) 33.36441 33.1038 c1 ( 32.703) $EA (234) 33.50638 33.2447 c1 ( 32.703) $E9 (233) 33.64957 33.3868 c#1 ( 34.648) $E8 (232) 33.79399 33.5300 c#1 ( 34.648) $E7 (231) 33.93966 33.6746 c#1 ( 34.648) $E6 (230) 34.08658 33.8203 c#1 ( 34.648) $E5 (229) 34.23478 33.9674 c#1 ( 34.648) $E4 (228) 34.38428 34.1157 c#1 ( 34.648) $E3 (227) 34.53509 34.2654 c#1 ( 34.648) $E2 (226) 34.68723 34.4163 C#1 ( 34.648) $E1 (225) 34.84071 34.5686 c#1 ( 34.648) $E0 (224) 34.99556 34.7222 c#1 ( 34.648) C#1 ( 34.648) $DF (223) 35.15179 34.8772 c#1 ( 34.648) $DE (222) 35.30942 35.0336 c#1 ( 34.648) $DD (221) 35.46847 35.1914 c#1 ( 34.648) $DC (220) 35.62896 35.3507 d1 ( 36.708) $DB (219) 35.79091 35.5114 d1 ( 36.708) $DA (218) 35.95434 35.6735 d1 ( 36.708) $D9 (217) 36.11927 35.8372 d1 ( 36.708) $D8 (216) 36.28571 36.0023 d1 ( 36.708) $D7 (215) 36.45370 36.1690 d1 ( 36.708) $D6 (214) 36.62326 36.3372 D1 ( 36.708) $D5 (213) 36.79439 36.5070 d1 ( 36.708) $D4 (212) 36.96714 36.6784 d1 ( 36.708) D1 ( 36.708) $D3 (211) 37.14151 36.8514 d1 ( 36.708) $D2 (210) 37.31754 37.0261 d1 ( 36.708) $D1 (209) 37.49524 37.2024 d1 ( 36.708) $D0 (208) 37.67464 37.3804 d1 ( 36.708) $CF (207) 37.85577 37.5601 d#1 ( 38.891) $CE (206) 38.03865 37.7415 d#1 ( 38.891) $CD (205) 38.22330 37.9248 d#1 ( 38.891) $CC (204) 38.40976 38.1098 d#1 ( 38.891) $CB (203) 38.59804 38.2966 d#1 ( 38.891) $CA (202) 38.78818 38.4852 d#1 ( 38.891) $C9 (201) 38.98020 38.6757 D#1 ( 38.891) $C8 (200) 39.17413 38.8682 d#1 ( 38.891) D#1 ( 38.891) $C7 (199) 39.37000 39.0625 d#1 ( 38.891) $C6 (198) 39.56784 39.2588 d#1 ( 38.891) $C5 (197) 39.76768 39.4571 d#1 ( 38.891) $C4 (196) 39.96954 39.6574 d#1 ( 38.891) $C3 (195) 40.17347 39.8597 e1 ( 41.203) $C2 (194) 40.37949 40.0641 e1 ( 41.203) $C1 (193) 40.58763 40.2706 e1 ( 41.203) $C0 (192) 40.79793 40.4793 e1 ( 41.203) $BF (191) 41.01042 40.6901 e1 ( 41.203) $BE (190) 41.22513 40.9031 E1 ( 41.203) $BD (189) 41.44210 41.1184 e1 ( 41.203) E1 ( 41.203) $BC (188) 41.66138 41.3360 e1 ( 41.203) $BB (187) 41.88298 41.5559 e1 ( 41.203) $BA (186) 42.10695 41.7781 e1 ( 41.203) $B9 (185) 42.33333 42.0027 e1 ( 41.203) $B8 (184) 42.56216 42.2297 f1 ( 43.654) $B7 (183) 42.79348 42.4592 f1 ( 43.654) $B6 (182) 43.02732 42.6913 f1 ( 43.654) $B5 (181) 43.26374 42.9258 f1 ( 43.654) $B4 (180) 43.50276 43.1630 f1 ( 43.654) $B3 (179) 43.74445 43.4028 F1 ( 43.654) $B2 (178) 43.98883 43.6453 f1 ( 43.654) F1 ( 43.654) $B1 (177) 44.23595 43.8904 f1 ( 43.654) $B0 (176) 44.48587 44.1384 f1 ( 43.654) $AF (175) 44.73864 44.3892 f1 ( 43.654) $AE (174) 44.99429 44.6429 f1 ( 43.654) $AD (173) 45.25287 44.8994 f#1 ( 46.249) $AC (172) 45.51445 45.1590 f#1 ( 46.249) $AB (171) 45.77907 45.4215 f#1 ( 46.249) $AA (170) 46.04678 45.6871 f#1 ( 46.249) $A9 (169) 46.31765 45.9559 F#1 ( 46.249) $A8 (168) 46.59172 46.2278 f#1 ( 46.249) F#1 ( 46.249) $A7 (167) 46.86905 46.5030 f#1 ( 46.249) $A6 (166) 47.14970 46.7814 f#1 ( 46.249) $A5 (165) 47.43373 47.0633 f#1 ( 46.249) $A4 (164) 47.72121 47.3485 f#1 ( 46.249) $A3 (163) 48.01220 47.6372 g1 ( 48.999) $A2 (162) 48.30675 47.9294 g1 ( 48.999) $A1 (161) 48.60494 48.2253 g1 ( 48.999) $A0 (160) 48.90683 48.5248 G1 ( 48.999) $9F (159) 49.21250 48.8281 g1 ( 48.999) $9E (158) 49.52201 49.1352 g1 ( 48.999) G1 ( 48.999) $9D (157) 49.83544 49.4462 g1 ( 48.999) $9C (156) 50.15287 49.7611 g1 ( 48.999) $9B (155) 50.47436 50.0801 g1 ( 48.999) $9A (154) 50.80000 50.4032 g#1 ( 51.913) $99 (153) 51.12987 50.7305 g#1 ( 51.913) $98 (152) 51.46405 51.0621 g#1 ( 51.913) $97 (151) 51.80263 51.3980 G#1 ( 51.913) $96 (150) 52.14569 51.7384 g#1 ( 51.913) $95 (149) 52.49333 52.0833 g#1 ( 51.913) G#1 ( 51.913) $94 (148) 52.84564 52.4329 g#1 ( 51.913) $93 (147) 53.20270 52.7872 g#1 ( 51.913) $92 (146) 53.56462 53.1463 a1 ( 55.000) $91 (145) 53.93151 53.5103 a1 ( 55.000) $90 (144) 54.30345 53.8793 a1 ( 55.000) $8F (143) 54.68056 54.2535 a1 ( 55.000) $8E (142) 55.06294 54.6329 A1 ( 55.000) $8D (141) 55.45070 55.0176 a1 ( 55.000) A1 ( 55.000) $8C (140) 55.84397 55.4078 a1 ( 55.000) $8B (139) 56.24286 55.8036 a1 ( 55.000) $8A (138) 56.64748 56.2050 a1 ( 55.000) $89 (137) 57.05797 56.6123 a#1 ( 58.270) $88 (136) 57.47445 57.0255 a#1 ( 58.270) $87 (135) 57.89706 57.4449 a#1 ( 58.270) $86 (134) 58.32593 57.8704 A#1 ( 58.270) $85 (133) 58.76119 58.3022 a#1 ( 58.270) A#1 ( 58.270) $84 (132) 59.20301 58.7406 a#1 ( 58.270) $83 (131) 59.65152 59.1856 a#1 ( 58.270) $82 (130) 60.10687 59.6374 a#1 ( 58.270) $81 (129) 60.56923 60.0962 a#1 ( 58.270) $80 (128) 61.03876 60.5620 b1 ( 61.735) $7F (127) 61.52 61.0352 b1 ( 61.735) $7E (126) 62.00 61.5157 b1 ( 61.735) B1 ( 61.735) $7D (125) 62.49 62.0040 b1 ( 61.735) $7C (124) 62.99 62.5000 B1 ( 61.735) $7B (123) 63.50 63.0040 b1 ( 61.735) $7A (122) 64.02 63.5163 c2 ( 65.406) $79 (121) 64.54 64.0369 c2 ( 65.406) $78 (120) 65.07 64.5661 c2 ( 65.406) $77 (119) 65.62 65.1042 C2 ( 65.406) $76 (118) 66.17 65.6513 c2 ( 65.406) C2 ( 65.406) $75 (117) 66.73 66.2076 c2 ( 65.406) $74 (116) 67.30 66.7735 c2 ( 65.406) $73 (115) 67.88 67.3491 c#2 ( 69.296) $72 (114) 68.47 67.9348 c#2 ( 69.296) $71 (113) 69.07 68.5307 c#2 ( 69.296) $70 (112) 69.68 69.1372 C#2 ( 69.296) C#2 ( 69.296) $6F (111) 70.30 69.7545 c#2 ( 69.296) $6E (110) 70.94 70.3829 c#2 ( 69.296) $6D (109) 71.58 71.0227 d2 ( 73.416) $6C (108) 72.24 71.6743 d2 ( 73.416) $6B (107) 72.91 72.3380 D2 ( 73.416) $6A (106) 73.59 73.0140 d2 ( 73.416) $69 (105) 74.28 73.7028 d2 ( 73.416) D2 ( 73.416) $68 (104) 74.99 74.4048 d2 ( 73.416) $67 (103) 75.71 75.1202 d2 ( 73.416) $66 (102) 76.45 75.8495 d#2 ( 77.782) $65 (101) 77.20 76.5931 d#2 ( 77.782) $64 (100) 77.96 77.3515 D#2 ( 77.782) D#2 ( 77.782) $63 ( 99) 78.74 78.1250 d#2 ( 77.782) $62 ( 98) 79.54 78.9141 d#2 ( 77.782) $61 ( 97) 80.35 79.7194 e2 ( 82.407) $60 ( 96) 81.18 80.5412 e2 ( 82.407) $5F ( 95) 82.02 81.3802 E2 ( 82.407) $5E ( 94) 82.88 82.2368 e2 ( 82.407) E2 ( 82.407) $5D ( 93) 83.77 83.1117 e2 ( 82.407) $5C ( 92) 84.67 84.0054 e2 ( 82.407) $5B ( 91) 85.59 84.9185 f2 ( 87.307) $5A ( 90) 86.53 85.8516 f2 ( 87.307) $59 ( 89) 87.49 86.8056 F2 ( 87.307) $58 ( 88) 88.47 87.7809 f2 ( 87.307) F2 ( 87.307) $57 ( 87) 89.48 88.7784 f2 ( 87.307) $56 ( 86) 90.51 89.7989 f#2 ( 92.499) $55 ( 85) 91.56 90.8430 f#2 ( 92.499) $54 ( 84) 92.64 91.9118 F#2 ( 92.499) $53 ( 83) 93.74 93.0060 f#2 ( 92.499) F#2 ( 92.499) $52 ( 82) 94.87 94.1265 g2 ( 97.999) $51 ( 81) 96.02 95.2744 g2 ( 97.999) $50 ( 80) 97.21 96.4506 g2 ( 97.999) $4F ( 79) 98.42 97.6563 G2 ( 97.999) G2 ( 97.999) $4E ( 78) 99.67 98.8924 g2 ( 97.999) $4D ( 77) 100.95 100.160 g#2 ( 103.826) $4C ( 76) 102.26 101.461 g#2 ( 103.826) $4B ( 75) 103.61 102.796 G#2 ( 103.826) $4A ( 74) 104.99 104.167 g#2 ( 103.826) G#2 ( 103.826) $49 ( 73) 106.41 105.574 g#2 ( 103.826) $48 ( 72) 107.86 107.021 a2 ( 110.000) $47 ( 71) 109.36 108.507 a2 ( 110.000) $46 ( 70) 110.90 110.035 A2 ( 110.000) A2 ( 110.000) $45 ( 69) 112.49 111.607 a2 ( 110.000) $44 ( 68) 114.12 113.225 a#2 ( 116.541) $43 ( 67) 115.79 114.890 a#2 ( 116.541) $42 ( 66) 117.52 116.604 A#2 ( 116.541) A#2 ( 116.541) $41 ( 65) 119.30 118.371 a#2 ( 116.541) $40 ( 64) 121.14 120.192 a#2 ( 116.541) $3F ( 63) 123.03 122.070 B2 ( 123.471) B2 ( 123.471) $3E ( 62) 124.98 124.008 b2 ( 123.471) $3D ( 61) 127.00 126.008 c3 ( 130.813) $3C ( 60) 129.08 128.074 c3 ( 130.813) $3B ( 59) 131.23 130.208 C3 ( 130.813) C3 ( 130.813) $3A ( 58) 133.46 132.415 c#3 ( 138.591) $39 ( 57) 135.76 134.698 c#3 ( 138.591) $38 ( 56) 138.14 137.061 C#3 ( 138.591) $37 ( 55) 140.61 139.509 c#3 ( 138.591) C#3 ( 138.591) $36 ( 54) 143.16 142.045 d3 ( 146.832) $35 ( 53) 145.81 144.676 D3 ( 146.832) $34 ( 52) 148.57 147.406 d3 ( 146.832) D3 ( 146.832) $33 ( 51) 151.42 150.240 d3 ( 146.832) $32 ( 50) 154.39 153.186 d#3 ( 155.563) $31 ( 49) 157.48 156.250 D#3 ( 155.563) D#3 ( 155.563) $30 ( 48) 160.69 159.439 d#3 ( 155.563) $2F ( 47) 164.04 162.760 E3 ( 164.814) $2E ( 46) 167.53 166.223 e3 ( 164.814) E3 ( 164.814) $2D ( 45) 171.17 169.837 f3 ( 174.614) $2C ( 44) 174.98 173.611 F3 ( 174.614) F3 ( 174.614) $2B ( 43) 178.95 177.557 f3 ( 174.614) $2A ( 42) 183.12 181.686 F#3 ( 184.997) $29 ( 41) 187.48 186.012 f#3 ( 184.997) F#3 ( 184.997) $28 ( 40) 192.05 190.549 g3 ( 195.998) $27 ( 39) 196.85 195.313 G3 ( 195.998) G3 ( 195.998) $26 ( 38) 201.90 200.321 g3 ( 195.998) $25 ( 37) 207.21 205.592 G#3 ( 207.652) G#3 ( 207.652) $24 ( 36) 212.81 211.149 g#3 ( 207.652) $23 ( 35) 218.72 217.014 A3 ( 220.000) A3 ( 220.000) $22 ( 34) 224.97 223.214 a3 ( 220.000) $21 ( 33) 231.59 229.779 A#3 ( 233.082) A#3 ( 233.082) $20 ( 32) 238.61 236.742 a#3 ( 233.082) $1F ( 31) 246.06 244.141 B3 ( 246.942) B3 ( 246.942) $1E ( 30) 254.00 252.016 b3 ( 246.942) $1D ( 29) 262.47 260.417 C4 ( 261.626) C4 ( 261.626) $1C ( 28) 271.52 269.397 c#4 ( 277.183) $1B ( 27) 281.21 279.018 C#4 ( 277.183) C#4 ( 277.183) $1A ( 26) 291.63 289.352 D4 ( 293.665) D4 ( 293.665) $19 ( 25) 302.84 300.481 d4 ( 293.665) $18 ( 24) 314.96 312.500 D#4 ( 311.127) D#4 ( 311.127) $17 ( 23) 328.08 325.521 E4 ( 329.628) E4 ( 329.628) $16 ( 22) 342.35 339.674 f4 ( 349.228) $15 ( 21) 357.91 355.114 F4 ( 349.228) F4 ( 349.228) $14 ( 20) 374.95 372.024 F#4 ( 369.994) F#4 ( 369.994) $13 ( 19) 393.70 390.625 G4 ( 391.995) G4 ( 391.995) $12 ( 18) 414.42 411.184 G#4 ( 415.305) G#4 ( 415.305) $11 ( 17) 437.44 434.028 A4 ( 440.000) A4 ( 440.000) $10 ( 16) 463.18 459.559 A#4 ( 466.164) A#4 ( 466.164) $0F ( 15) 492.12 488.281 B4 ( 493.883) B4 ( 493.883) $0E ( 14) 524.93 520.833 C5 ( 523.251) C5 ( 523.251) $0D ( 13) 562.43 558.036 C#5 ( 554.365) C#5 ( 554.365) $0C ( 12) 605.69 600.962 D#5 ( 622.254) D5 ( 622.254) $0B ( 11) 656.17 651.042 E5 ( 659.255) E5 ( 659.255) $0A ( 10) 715.82 710.227 F5 ( 698.456) F5 ( 698.456) $09 ( 9) 787.40 781.250 G5 ( 783.991) G5 ( 783.991) $08 ( 8) 874.89 868.056 A5 ( 880.000) A5 ( 880.000) $07 ( 7) 984.25 976.562 B5 ( 987.767) B5 ( 987.767) $06 ( 6) 1124.86 1116.071 C#6 (1108.731) C#6 (1108.731) $05 ( 5) 1312.33 1302.083 E6 (1318.510) E6 (1318.510) $04 ( 4) 1574.80 1562.500 G6 (1567.982) G6 (1567.982) $03 ( 3) 1968.50 1953.125 B6 (1975.53 ) B6 (1975.53 ) $02 ( 2) 2624.67 2604.167 E7 (2637.02 ) E7 (2637.02 ) $01 ( 1) 3937.00 3906.250 B7 (3951.07 ) B7 (3951.07 ) $00 ( 0) --------------------------rest----------------------------- This should assist in illustrating why tones are off-key. The algorithm for tone generation is: NTSC frequency = 7874 Hz / (PITCH + 1); PAL frequency = 7812.5 Hz / (PITCH + 1); Noise ----- The following code fragments are given in the "TV Games Computer" book, p. 187: ;"sound off" ;NOISE = 0; eorz r0 stra,r0 NOISE ;"sound off" ;NOISE = 0; lodi,r0 0 stra,r0 NOISE ;"PVI sound on" ;NOISE = 4; lodi,r0 4 stra,r0 NOISE ;"noise (ie. explosion) on" ;NOISE = $10; lodi,r0 $10 stra,r0 NOISE "Noise", in the discussion in that chapter, refers to the explosion generator ("bang" sound), not the white-noise generator. Colours ------- R,G,B ----- 0: black 0,0,0 Colours 0..7 are fullbrite (FB). 1: blue 0,0,2 2: green 0,2,0 3: cyan 0,2,2 4: red 2,0,0 5: purple 2,0,2 6: yellow 2,2,0 7: white 2,2,2 8: "dark black" (black) 0,0,0 Colours 8..15 are halfbrite (HB); 9: dark blue 0,0,1 they are approximately half as 10: dark green 0,1,0 bright as the corresponding 11: dark cyan 0,1,1 fullbrite colours (0..7). 12: dark red 1,0,0 13: dark purple 1,0,1 14: "dark yellow" (brown) 1,1,0 15: "dark white" (grey ) 1,1,1 RGB values of 0: zero intensity 1: half intensity (approx?) 2: full intensity Background colour is: 8 + (bits 2..0 of BGCOLOUR ) (ie. 8..15) Grid colour is: 8 + ((bits 6..4 of BGCOLOUR ) >> 4) (ie. 8..15) Digit colours are: 7 - ((bits 6..4 of BGCOLOUR ) >> 4) (ie. 0.. 7) Sprite #0 colours are: 7 - ((bits 5..3 of SPR01COLOURS) >> 3) (ie. 0.. 7) Sprite #1 colours are: 7 - (bits 2..0 of SPR01COLOURS) (ie. 0.. 7) Sprite #2 colours are: 7 - ((bits 5..3 of SPR23COLOURS) >> 3) (ie. 0.. 7) Sprite #3 colours are: 7 - (bits 2..0 of SPR23COLOURS) (ie. 0.. 7) The digit colour is always dependent on the grid colour, and vice versa, as shown: BGCOLOUR Grid Digits %x000xxxx black white %x001xxxx dark blue yellow %x010xxxx dark green purple %x011xxxx dark cyan red %x100xxxx dark red cyan %x101xxxx dark purple green %x110xxxx brown blue %x111xxxx grey black Note that some Interton VC 4000 family members, such as the Fountain, apparently use fullbrite mode rather than halfbrite mode. See the Elektor TV Games Computer Coding Guide for information about fullbrite mode. Digits ------ Each digit is 12*20 pixels. Digit Y-area is 20..39 and/or 200..219, depending on SCORECTRL. 1st digit X-area is 60.. 71. 2nd digit X-area is 76.. 87. 3rd digit X-area is 92..103 or 108..119, depending on SCORECTRL. 4th digit X-area is 108..119 or 124..135, depending on SCORECTRL. Sprites ------- SPRITEnAX: "If SPRITEnAX is changed during the time that the corresponding object video is being displayed, the portion of the object not yet displayed will be displaced to the new horizontal position." Ie. it is resampled every pixel (at least whilst the sprite is being displayed). SPRITEnAY: "The value of SPRITEnAY is 'remembered' at the trailing edge of VRST. Thus, if SPRITEnAY is changed during the active scan, the vertical object position change will not be effective until the next active scan." Ie. it is sampled once per frame (at the end of vertical blank). SPRITEnBY is when to redraw (reuse) the sprite: $FF means 0 rastlines gap $00 means 1 rastline gap $01 means 2 rastlines gap $02 means 3 rastlines gap $FC means 253 rastlines gap $FD means "never" (but this register will still be reexamined each rastline?) $FE means "never" (but this register will still be reexamined each rastline?) According to the 2636 PVI datasheet: Sprite X = SPRITEAXn + 1 (assuming leftmost clock is 0) Sprite Y = SPRITEAYn + 1 (assuming topmost raster is 0) SPRITEAXn of >= 228 is not displayed. SPRITEAYn of >= 253 is not displayed. SPRITEAXn is not cached (or is cached during HRST). SPRITEAYn must be changed by (ie. it is cached at) the end of VRST. SPRITEBXn is cached during HRST. SPRITEBY is sampled just prior to displaying the last line of the (original or duplicate) object. That sampling presumably wouldn't affect the last line itself. "The interrupt generation occurs during the horizontal sync at the end of the last line of the sprite display." - Manfred Schneider. SIZES is as follows: two bits per sprite (#3,#2,#1,#0): bits 7..6: sprite #3 size bits 5..4: sprite #2 size bits 3..2: sprite #1 size bits 1..0: sprite #0 size %00 = 1x size ( 8*10 pixels) %01 = 2x size (16*20 pixels) %10 = 4x size (32*40 pixels) %11 = 8x size (64*80 pixels) Timing ------ 1 "long" cycle (3 "short" cycles) requires 3.38uS (microseconds). So, in 1 second, approx. 295,856.9781484442 (1,000,000/3.38) "long" cycles can be executed. So, in 1 frame (1/50 of a second), approx. 5,917.16 "long" cycles can be executed. So, in 1 raster (1/312 of a frame), approx. 18.96526 "long" cycles (approx. 56.89576502854696 "short" cycles) can be executed. "There are a total of 262 scan lines: 192 in the active display, 38 before and 32 after. The PVI uses a 3.579545 MHz crystal. This frequency, divided by 4, is used to clock the CPU. Thus, during a screen scan line 56.75 CPU cycles occur. Rounding this value to 57, some games cease to work." - Lance Squire. Common Misconceptions --------------------- There are many inaccuracies which have become widely believed. These will now be corrected: * The Interton VC 4000 was supposedly made from 1974 but not sold until 1978. However, the Signetics 2650 CPU was only made from 1975; therefore, the Interton VC 4000 could not have been made from 1974. * There are 16 colours, not 9. * There are no multicoloured sprites. All sprites are single-colour (although the same effect can of course be achieved by superimposing multiple sprites on the screen). 2636 PVI Datasheet Example -------------------------- SPRITE1AX = 42 SPRITE1AY = 36 SPRITE1BX = 30 SPRITE1BY = 9 (10 line gap) Sprite #1 ( original) is shown at 42..49, 36.. 45. Sprite #1 ( 1st dup.) is shown at 30..37, 56.. 65. Sprite #1 ( 2nd dup.) is shown at 30..37, 76.. 85. Sprite #1 ( 3rd dup.) is shown at 30..37, 96..105. Sprite #1 ( 4th dup.) is shown at 30..37,116..125. Sprite #1 ( 5th dup.) is shown at 30..37,136..145. Sprite #1 ( 6th dup.) is shown at 30..37,156..165. Sprite #1 ( 7th dup.) is shown at 30..37,176..185. Sprite #1 ( 8th dup.) is shown at 30..37,196..205. Sprite #1 ( 9th dup.) is shown at 30..37,216..225. Sprite #1 (10th dup.) is shown at 30..37,236..245. Either 250 or 251 is the last displayable rastline. SPRITE2AX = 62 SPRITE2AY = 20 SPRITE2BX = 88 SPRITE2BY = 27 (28 line gap) Sprite #2 ( original) is shown at 62..69, 20.. 29. Sprite #2 ( 1st dup.) is shown at 88..95, 58.. 67. Sprite #2 ( 2nd dup.) is shown at 88..95, 96..105. Sprite #2 ( 3rd dup.) is shown at 88..95,134..143. Sprite #2 ( 4th dup.) is shown at 88..95,172..181. Sprite #2 ( 5th dup.) is shown at 88..95,210..219. Sprite #2 ( 6th dup.) is shown at 88..95,248..250/251? Emulation Unknowns ------------------ The 5 main unknowns of Interton emulation are: * exactly what the latching behaviour of the PVI is (eg. exactly how often and at what x,y points in the frame the PVI reads or writes each of its registers). * bus contention (each time the PVI accesses memory the CPU is blocked and enters a wait state if it tries to access memory at the same time). * exact state of the system at startup (values of the memory contents). * mirroring: what actual addresses reads and writes are resolved to. * exactly what happens when the CPU executes each of the undocumented CPU instructions. Resolved PVI Questions ---------------------- 1. Are mid-sprite changes to SPRITEnAX effective? (TESTER2.PGM confirms that they are.) "If SPRITEnAX is changed during the time that the corresponding object video is being displayed, the portion of the object not yet displayed will be displaced to the new horizontal position." - PVI manual, p. 5. "Unlike SPRITEnAX and SPRITEnAY, SPRITEnBX and SPRITEnBY may be changed during the scan and such changes will be effected on the current scan." - PVI manual, p. 5. The first statement is correct. The second statement should be amended to "Unlike SPRITEnAY, SPRITEnBX and SPRITEnBY may be changed during the scan and such changes will be effected on the current scan." 2. How do sprite coordinates relate to eg. grid coordinates? eg. SPRITEnAX=31,SPRITEnAY=19 is top left of grid (according to 2636 PVI datasheet, p. 5) or is above and to the left of the top left grid (according to 2636 PVI datasheet, p. 6) SPRITEnAY = $FF aligns the sprite to raster 0 SPRITEnAY = $00 aligns the sprite to raster 1 SPRITEnAY = $01 aligns the sprite to raster 2 etc. This is demonstrated by eg. Interton BLACKJAC. Chips ----- The Come-Frutas game uses these chips: Texas Instrument TMS2114L-45NL BP8109 (x2) These are 1K 4-bit RAM chips. 2 wired together make 1K of 8-bit RAM. Texas Instrument sn74ls10n-10 NAND gates (glue logic) National Semiconductor (NSC) SP8323* DM74LS04N hex inverting gates (glue logic) NEC D2732D 8335PX052 4K 8-bit EPROM Emulation Notes --------------- Interton VC 4000: assumed behaviour is that the low nybbles of CONSOLE and PnFOOKEYS are set to %1111, the same as is proven to occur on an Elektor TVGC. Gridlines that are the same colour as the background (ie. invisible) don't register collisions. This seems to be the correct behaviour. Based on Catapult, Destroyer and Submarine+Racing (all for Elektor), the real PVI probably doesn't involve the digits in collision detection. ESS-011-7-OmegaLanding and ESS-011-D-Painting seem to expect collisions at the far left (< 9) to not register. "Unlike SPRITEnAX and SPRITEnAY, SPRITEnBX and SPRITEnBY may be changed during the scan [(frame)] and such changes will be effected on the current scan [(frame)]. SPRITEnBX is sampled during each HRST [(horizontal reset)]. Thus, if SPRITEnBX is changed during the display of a duplicate, a portion of the object will be displaced horizontally. For proper operation, SPRITEnBX should be changed only *after* the 'Object Video Completion' status bit [in BGCOLLIDE] indicates completion of the object. SPRITEnBY is sampled just prior to displaying the last line of the object. To effect a change in the vertical offset to the next duplicate, SPRITEnBY must be changed *before* the 'Object Video Completion' status bit [in BGCOLLIDE] indicates completion of the object." - PVI manual, p. 5. But that is incorrect as CIRCUS relies on being able to change SPRITEnAX so that the balloons are drawn properly. "I have just found a bug in Munch & Crunch which no doubt explains the occasional glitches I have seen. It's in my simplistic return from interrupt: loda,r0 STOREPSL lpsl loda,r0 STORER0 rete,un The problem of course is that the condition code in the PSL gets changed by the final load instruction. Having looked at other disassemblies I must say that I'm impressed by how the AND $C0 to a copy of PSL correctly restores the condition code. The condition codes were obviously carefully chosen when designing the processor. From Blackjack: loda,r0 PRESERVEPSL ;r0 = PRESERVEPSL strz r4 ;r4 = r0; lpsl ;PSL = r0; restores psl but with bank 1 loda,r0 PRESERVER0 ;restore r0 andi,r4 $C0 ; cpsl $10 ;Bank 0 rete,un ; The 2650B with its LDPL and STPL instructions was a big improvement." - Derek Andrews. END OF DOCUMENT-----------------------------------------------------------