PAGE 1-------------------------------------------------------------------- Description C.P.U. card and interface card "PHUNSY" ------------------------------------------ -------- This is the logical continuation of the previously published story about the Phunsy. For those not in possession of the newsletter with the above descriptions and diagrams, these can still be obtained from undersigned. Then there was already a small and a larger system. The heart of the systems is called C.P.U. card. This is the small system is already used but not yet fully exploited. Things that was not necessarily needed, were then not treated and are now turn. The 2K RAM on the C.P.U. Card UAS did not immediately necessary, but could no longer be used. But now the 2K RAM available for e.g. the scratchpad of the monitor. This can be disabled 2K RAM by bus A21 layer. If the same memory location to another memory would be placed (eg. PROM), then the first should be eliminated. Removing the print is not possible, hence this approach. The RAM is located from address 0800 to 0FFF. The monitor is packed in a 2K EPROM type 2716 (2516). The description of the monitor will follow later. The monitor is like the RAM switched off but d.m.v. A20 bus. We saw this in the small system. The state of bus A20 which monitor certain work should be. If A20 is low (main monitor off) and A22 also low, then both monitors off. On C.R.U. map the C-port "gelatched" offered to the busprint. Bit 0 to 3 of the C-port is used to memory between address 7FFF and 4000 (page 3 and 4) be extended to 16 times this capacity. The same happens with bit 4 to 7 but for memory locations 1800 to 1FFF and the latter for the port extended expansion between 80 and FF. The locations 1800 to 1FFF get to this PROM card system which can be chosen to sit between 2K RAM or 3 different (E) PROMs containing e.g. The M.D.C.R. program and a type disassembler. The interface card has close ties to the CRU card. No communication between the user and without the uP interface. Displays connected: an ASCII keyboard, an input and output serial processing task according to the RS-232 standard and possibly a M(ini) D(igital) C(assette) R(ecorder). All signals pass through the D port. The D-port is specially reserved and in the whole system not used. The D-port here has two input ports and one output port. The choice between input ports is being made using output port bit 1. If this bit is low, then the top input port (74LS244) used, but this bit is high then the choice on the bottom input port. First discuss the output port. To bit 0 appears T.T.Y. signal. This is converted from a 0-5 volt logic to + and - 12 volts, d.m.v. the op-amp 741. Bit 1 has already treated. Bit 2 resets the keyboard flip-flop, but this we come back later. Bit 3 may send a custard "LoFi" a ladder speaker. This can luidprekertje e.g. housed in the keyboard. The monitor provides a pulse train in the video at bit 3 as routine monitor an ASCII BELL character. Bit 4 to 7 control the M.D.C.R. Of these bits is 4 bits for the /REV (reverse), this is intended to run the tape backward. Bit 5 /FWD (forward) shows the band turning forward. If the connections /REV and /FWD is both high the belt is stopped. Bit 6 /SCAN (command write) is the "record" command, this will run the mop head and the WDA (write data) signal, bit 7, passed. The WDA signal contains the serial data should be included. We continue now with the upper input port. PAGE 2-------------------------------------------------------------------- Of these bits 3 through 7 again for the MDCR used. Bit 7 RDC (Read clock) is used for synchronizing the recorder next signal. Bit 6 RDA (read data) contains the serial signal from the tape to the computer. Bit 5 /BET (start/end of tape) is lower than the tape to the beginning or end of the band. Bit 4 /CIP (tape position) is If the recording layer security and the cassette tape inside the recorder is. Bit 1 and 2 are connected to a switch both high and low and can be made. These switch positions be "canned" by the monitor program. With Sk 1 (bit 1) closed (low) runs the entire process of data processing through the serial T.T.Y. connection. This respect the input of a keyboard on a teletype as well as the contents of a paper tape reader and the outputs to a writer or a punch tape recorder. The ASCII keyboard is now outside soaking. With an open switch Sk is the possible dates of keyboard and returns the T.T.Y. only used to connect a paper tape reader to read or write. Sk 2 switches the baud rate the T.T.Y. input and output to between 110 and 300 baud. The baud rate of the M.D.C.R. is fixed at 6000. Bit 0 is the input for the RS-232 signals offered on T.T.Y. connection. These signals are first clipped and then inverted into a 0-5 volt level. On T.T.Y. connection can also tape and connected are, this needs to be done through a sales box which in itself is a constitutes a separate device. This cabinet is he serial computer signal into two frequencies and one for the tape acceptable level. Also there is a connection in the box the two frequencies into ones and zeros. This cabinet has its own power and can also be used for information tape directly and T.T.Y. turn, which turns out to be very useful. This housing will be published later. The lower input port is for the ASCII keyboard. The moment a key is pressed on the keyboard is also a positive going strobe pulse is generated that is. This pulse ensures that the outputs of the flip-flop's, formed by NAND gates, high be. This is offered to bit 7 of input port. If the computer here a high signal it will first provide the flip-flop's reset d.m.v. bit output port 2. Then he see what ASCII code is offered to the keyboard plug. This comes via the input port bits 0 to 6 on the data bus and is further processed. To avoid a any character is brought inside by turning the food and the high coincidence of the output of the flip-flop's the flip-flop's reset d.m.v. the power-on reset. Since not all keyboards or be equipped with a reset button on the interface card on this one circuitry. In the small Sat system the reset button on the keyboard hex box. The large system this cabinet is not needed, which is the ability to reset would expire. So much for the C.P.U. card and the interface card. Theoretically, with these two cards. busprint one and a diet for a system that would work d.m.v. a T.T.Y. But it is limited, so there will be Kommende episodes still get the following enhancements: video interface 8K RAM card (static) 16 in and 16 out interface RAM / EPROM card 3 x (2K each) 8/16K RAM cards (dynamic) The next installment will deal with the monitor. Frank Philipse Ben Postema © 1980 PAGE 3-------------------------------------------------------------------- [Schematics] PAGE 4-------------------------------------------------------------------- [Schematics] PAGE 5-------------------------------------------------------------------- [Pin assignment table] PAGE 6-------------------------------------------------------------------- Phunsy Monitor -------------- In the following episode, as announced, the monitor described, is strictly software. It appears to us that it is an impossible task was to monitor its entirety to parse and to speak to each instruction treatment. This would be a Peyton Place-like whole, the editorial board of the Agency Bulletin next year it did not have to complain about copy. Therefore we have no listing for besolten publish the description is not relevant. The description is possible cast in the form of a manual. This gives The dear reader any idea of working with this monitor. There are in addition The options listed here are a few things in the practical eerg use comfortably, but not be touched because of clarity. Those who monitor the ins and stocking wish to know to hit up the undersigned for a copy the listing of possible explanations of specific cases. Of these monitor is also a version that is adapted to print the 2650 club. This adjustment consists mainly of a redesigned image routine. But it would require a hardware interface portion, such as Phunsy described in the previous section. An overview of the memory bank structure with possibilities. These banking options are designed to drastically memory file extend (up to 302K). We obderscheiden two bank selections and a memory bank select receivers for the extended I / O port expansion. Bank selection is applied to the addresses 1800 to 1FFF. These are blocks of 2K each and ideal for dis-assembler, line assembler, printer routine, M.D.C.R. program, modem program, PROM programmer, etc. We give these blocks with the letter U. The original block is called bank 0 and 1 extension to F. These are selected by the C-bit output port 4 to 7. At the addresses 4000 to 7FFF select bank is also used, but with blocks of 16K each. These blocks are denoted by the letter Q. They selected d.m.v. C output port bit 0 to 3. The extended ports can also be expanded and then using omgeschalkeld C output Port bit 4 to 7. This applies only to the ports 80 to FF. This means relation to the "banks" for the addresses 1800 to 1FFF. Each bank has now a piece of memory and a number of its own input and output ports. PAGE 7-------------------------------------------------------------------- The building block is shown schematically. Some connections are omitted to reduce clutter. [Flowchart] Description of the structure. -------------------------- The reset is pure hardware set up by the power-on reset and manual reset and speaks for itself. The initialization block is a preset type of software. This clears the screen, move the cursor left (home), makes the output ports C and D zero, looks at the positions of the switches on the interface board and provides the scratch-pad RAM required information. The input routine works closely with the input buffer of 1/4K. In the beginning of this routine, first the input buffer pointer to put zero. All commands are typed into the input buffer, whereas they on the screen to admire. When typing addresses and data can preride zeros. Withdrawal from the input routine place only after the return command (hereinafter referred to here as CR). PAGE 8-------------------------------------------------------------------- The command-select block begins again with the input buffer pointer zero. It scans the input buffer until enough data hands to a particular command to execute effectively. A command consists of ASCII character and, possibly preceded by and or more addresses. Example: the addresses 800 to be BFF on tape be put. Typed: W CR 800-BFF (spaces are not typed!) If an incorrect command, an ERROR message is given and the program back to the input routine. Following are the final routines. These are all subroutines so they can be used separately. Below is a brief description and a routine called start address. 1) Inspect Memory (I) "0449" This routine allows the contents of memory on the screen into rows of 16 bytes. Example: 0 - FF I CR (memory block) " : I EE9 CR (one memory) " : EE9 CR III (3 consecutive memory locations) 2) Change Memory (:) "048A" It can change a memory location or a n-number memory read. A space between each byte must be included. Example: 800: April 1920 CC 1980 E CR 17 ': 801: 41 CR (1 address changes) 3) Move Memory (M) "04D4" This can be a block of memory. The start and end address the block is entered and the first address of the destination. In between, a> sign are included. Example: 800 - 8FF> C00'M CR 4) Verify Memory (V) "04F3" This can be compared to a block measuring a different block. The to type in the same way as with "Move Memory". Inequalities indicated on the screen. Example: 800 - 8FF> C00 V CR By inequalities appear on the screen e.g.: 81A: 04 C1A: 08 81B: 00 C1b: 08 5) Write Tape (W) "0540" This routine can a piece of memory on tape being written. This is done via the port D bit 0 and the RS-232 circuit. The speed which this happens is determined during initialization, depending the state of the baudrateschakelaar Sk 2. If one wants to deviate then 1 byte in the scratch pad change, namely "0EE9. FE = 110 baud, 300 baud = 5A. After amendment shall not be meeer gerest. The Writing is preceded by the needed information to the Read back again to the same address to arrive. Each data is 1/4K followed by a checksum. Example: 800 - CFF W CR 6) Read Tape (R) "05E8" Now data from tape storage to be put. This is via the D- 0 bit input port and RS-232 circuit. V.w.b. the baud rate to see Write Tape. Example: R CR PAGE 9-------------------------------------------------------------------- 7) Set Breakpoint (S) "0631" This routine can interrupt a program in RAM with the intention a current understanding of the registers, PSU and P.S.L. in the processor. Where you want the monitor replaces an instruction ddor a branch instruction to the monitor. Is the breakpoint reached, put back the old instruction and all put registers on the image. After one has the choice to continue with the program or go back to the monitor. If you want to continue, then C (continuous) are pressed. If one wants not to exceed each key is suitable (except the C versions). Example: 820 S CR 800 CR G (what if the program starts here) when the breakpoint is reached on the screen: : 01 R1: 40 ... PSL: 40 8) Go to Memory (G) "0717" This routine starts a program on the typed address. This jumped off the monitor if the program is a subroutine. This allows for a return after a program to transfer (RETC / RETE). But the program may not be the Program Stack Pointer on put zero. Example: 800 G 9) Calculate (=) "0726" This makes it possible for two bytes to add or subtract. Example: 5 + 3 = CR on screen: 08 Example: D3 - 5 = CR on screen: CE Example: 35 - 1A = CR on screen: 1B 10) U is a command with two functions. 1st Bank Select First, a hex number you typed in and then, it appears number on the C-bit port 4-7. This is a bank selected between 1800 and 1FFF. For the banks, the memory structure. 2nd Go to address 1800 The U typed without a hex number preceded, then monitor jumps to address 1800. This is the same as 1800 G CR. It is also possible to select a bank, whilst go to jump through e.g. 5UU CR typing. 5U and select the You take care of the leap second to it. The extended input-output ports 80-FF are selected along with U. 11) For Q is the same as you, except: The first bank is selected by the port C bits 0-3. The bank is now second selection from 4000 to 7FFF. 12) Tape (T) "0770" This causes a bank to select a 1800-1FFF and a leap forward increasing. In fact the bank is a M.D.C.R. program (this is not now treated). The command is identical to T 1UU CR. Routine image ------------ The routine is based on image and image of 64 characters per line and 32 rules. Total image memory is 2K. This memory is located on the addresses 1000 to 17ff. The image (sub) routine starts at address "00EB". If an ASCII character in R0 and a message to jump image routine, this character in the picture PAGE 10------------------------------------------------------------------- or place the cursor changes, then jumped back again to what he was doing. Some commands are only for the imaging routine. The are the following: NULL (Ctrl +0) "00": screen is cleaned and the cursor top left ENQ (Ctrl + E) "05": the line where the cursor is on is cleaned from cursor CAN (Ctrl + X) "18": the line where the cursor is on is cleaned ACK (Ctrl + F) "06": the screen is cleaned from the place where the cursor FS "1C": cursor right GS "1D": cursor down RS "1E": cursor left U.S. "1F": cursor up BS (Ctrl + H) "08": cursor left, but also the input reduced buffer pointer (as opposed to RS) NAK (Ctrl + U) | 15 ": cursor to the right, but also the input increased buffer pointer and the character places where the cursor over it, are included in the input buffer (as opposed to FS) Software, the margins of the image can be determined. This may very useful if it is not desirable that the whole picture "scrolled" , but e.g. Only the lower part. After a reset are the margin- bytes so gepreset ate the whole image is used. The following scratch-pad memory locations are provided for this: "0EF0": top 00 after reset margin "0EF1": 00 linkter margin after reset "0EF2": 1F lower margin after reset "0EF3": 3F right margin after reset When you change should be taken that the left margin in HEX not greater than the right line or vice versa. The same is true the top and bottom lines. Serial usage --------------- As for the serial input and output is the following. On the interface PCB is a switch that Sk 1 choice between serial and parallel communications. At initialization are a few bytes in the scratch-pad gepreset, it shall ensure that jumped is the preferred choice when the need for import or output firms. By changing the bytes it is possible to serial and parallel, or vice versa, to businesses. Dok do d.m.v. a very small program manages both serial and parallel use. The input and output routines start at the following addresses: parallel: "0054" (ASCII keyboard) parallel: "00EB" (video interface) serially in: "05C8" (RS-232 connection) serial UIN: "0588" (RS-232 connection) Frank Philipse Ben Postema © 1981 PAGE 11------------------------------------------------------------------- Busprint connections "PHUNSY" ---------------------- -------- Publication of the dram print was a great excuse to gewijzidge busprint connections to the light show. This gives those who do not familiar with the Phunsy a houwvast about how and where the bus connections. The changes from the first publication (ECA Bulletin No. 5, 1980) are not dramatic. The control lines / E, / RE / WE and / WE.WRP (A10 to A13) have expired. This was no objection, because they have not been used. The aim was twofold. Hand This spared the C.P.U. Print a PROM (82S123) and the other is the decoding of the dropped signals easy to achieve. The lines can now be released for personal purposes. Also is the line / RAMDIS (1800-1FFF) (A22) fell. In their place with two A234 direct memory access control lines created to a processor and a DMA request line of the response processor to indicate that DMA can be operated. The DMA circuit should home on the C.P.U. print and bring the data, address and control lines from the processor in the tri-state position and the lines Co0 to CO7. The schedule of the adjusted CP.U. print is not yet published in Dutch. For the rest, the remaining shares the same connections. [Table] PAGE 12------------------------------------------------------------------- VIDEO INTERFACE "PHUNSY" --------------- -------- Before we begin describing the scheme we first courses are watching how the characters are. Each character consists of a field 6 to 8 lines of columns is 48 points. Two PROMs guarantee the character formation. One can thus constitute up to 128 characters: uppercase and lowercase letters, numerals, Greek alphabet and various characters. This character is not used the top line and left column in the field. These serve as the space between the lines c.q. characters themselves. All fields are n.l. against each other in connection with the graphic characters. For graphic characters is a character field divided into four sections. There are 16 possibilities for a field fill. Also a lot of field (for 4 boxes) the gray tint and this set in 8 steps. The choice between graphic or ASCII characters is determined by a bit in the data information, bit 7. Total of ASCII characters 128 and 128 graphics. [Diagram] The image has 32 lines of 64 characters, which is exactly 2K memory matches. This gehueugen runs from 1000 to 17ff and is put on the screen so that memory location 1000 and left 17ff right. Just so ascending from left to right and from top to below. The schedule: The heart of the circuit is the time base. This is powered by August 1 Mc clock from the CPU board. The time base conducts all signals from and to the right place at the right time. 2K block of memory required for the image content, can be a memory normally used, while "simultaneously" also on the screen is put, that miracle touch on the screen distracting effect. How this works is we try to explain below. We go here in some detail, partly for those interested the usual structure of a video to show, partly to significant difference at this interface clear. The time base: This circuit consists of five counters with some logic around it. This so that the counters count gwenste signals to various outputs available. K is one of the most important. This signal has a frequency of 15,625 hertz, or the line frequency. K is low and 16uS 48uS Hoag and determines, with regard to a line, and when there is no Video can be transmitted. The carry-out counter is the first strobe, which depend on K or not a line from a character in of the shift register circuit converts the video end. K is low then the strobe and remains inhibited the shift register zero extend. The / BL signal provides the rasterblanking, this signal resets the shift register, so the output is also zero. During the write a line to determine the signals E through J which characters successively PAGE 13------------------------------------------------------------------- a rule be put. The signals R to S counting rules. This signals E to J and O to S are, afhankelijn signal from the D first counter, alternating with the address lines offered on the address inputs of RAM. Furthermore, the signals L through N in order to ensure postponed until the line of a character's turn. These go to the inputs A0 to A2 of the character PROM's. The video sync signal decoded from various counter outputs. The video signal: The video signal (see top graph) consists of 313 lines, 256 there can be provided with image information. After written examples follow first 13 blank lines. Then there are four lines that synchronization grid forms. These are generated so that the lines between The downward slopes of the line sync constant. The following are 40 blank lines before the image information may contain. The ratio of these empty lines has been chosen so that at a normal adjusted TV, the picture in the middle between the top and bottom stands. The line sync is a signal that 60uS 4US high and low. The time a video on a line may be determined by signal K. Information However 750nS delayed because it in 6 steps by 125nS the shift register is uigeschoven. The time between video and the line sync is 3.25 uS after the sync and this time is 8.75 uS. The sync itself 4US together So 16uS. The time that video signal can be present is 48uS. This time falls within the standard time of 52uS, so that the image does not only shorter but also narrower. Again, the times so chosen that the picture in the middle. Since When design a gate with five inputs was over, is also the color-burst time uitgedecodeerd. It n.l. possible rather than gray colors through behind this circuit is a color generator to hang. The memory circuit (see bottom graph) The problem of memory circuit was not entirely certain that the is when the 2650 wants to change something in memory and when not. OPREQ there is always the same length, but what time he says no. Therefore, the I / O of the asynchronous circuit. The signal Q determines flatly that the uP or counters at their turn, and then by 3 four-bit selectors. Between the image on the set of two characters is 250ns time to do IO. (The RAMs should be so soon have. To read the memory, or interesting or not, increasing the available information after the 250ns outputlatch clocked. By the time the drops OPREQ the information is always present. Of uP to the memory is difficult. There is a circuit with two flip-flops that ensures that after the start of the first OPREQ / WHOLE time I / O (250ns) is used for something to put in RAM. How is it best to dig to look at the graph, otherwise it story that would be too long. Shares the same applies to the counting sequence. The character building: This circuit has two PROMs that are the ASCII characters. For graphic characters is a circuit that determines which cell is on or off and a circuit that determines the gradation. The information is the shift register is extended to a type D / A converter. This consists of a few resistances that the black level and the gradation determined. In ASCII characters is always the highest grade level. Transistor finally brings the impedance down. Summary: The entire circuit fits on a Eurocard. There is no real print layout, so it was little soldering center. The RAMs should really have a maximum of 200ns toeganstijd otherwise appear strange goings on screen, especially in the deferral of image. Frank Philipse Ben Postema © 1981 PAGE 14------------------------------------------------------------------- (Schematics) PAGE 15------------------------------------------------------------------- (Schematics) PAGE 16------------------------------------------------------------------- (Diagram) PAGE 17------------------------------------------------------------------- 32K D.R.A.M. print "PHUNSY" ------------------ -------- This memory board is specially designed for "2650" oriented systems while implementing prktische completely incorporated in the Phunsy framework. This does not mean that no other print 2650 systems or even other processors to use. There will be The necessary changes should be, we shall meet later. This design assumes that the 2650 processor clock about 1 Mc. , while refreshing for about 8 Mc. should be offered. A problem with the structure was approximately the same type as the video interface, the OPREQ, which is responsible for starting the I / O (memory) cycle, it is known how long he lasts (1.5 uS), but not when they comes. Gemakshelve we share the schedule in the following sections: A) address (and bank) decoding B) memory and refreshing A) The 32K memory actually consists of two separate blocks of 16K each. The blocks are addressed from $ 4000 to $ 7FFF. Each block can draw poker "Banked" to be. This is totally possible x 16. These banks made m.b.v. Co0 the bus to Co 3. Fine for the "banking" we refer to the chapter MONITOR, E.C.A. Bulletin No 8, 1981. The address decoding is fixed, the bank decoding is done with four switches i.s.m. lines Co0 to Co 3, all buffered. B) also refreshing to see the timing diagram. Refreshing is essential for dynamic RAMs, without this data would only about 2 msec. detained. But by now a constant address on the address input clocks can prevent our RAMs to suffer from amnesia. Each consists of a RAM matrix consisting of seven rows and seven columns. These rows and columns have the same connections to the outside. Two other pins selected rows or columns Be it the turn are: / RAS (Row Address Select) and / CAS (Column Address Select). To refresh only the / RAS uses. The heart of the refresh is happening 16 programmable counter "74LS163". This is fed by 8 Mc. clock. During the refresh appears at the outputs A, B, C and D (pins 14, 13, 12 and 11) successively the counter 2, 3, 4, 5, 2.3 4, ... etc. In the transition from 2 to 5 is a negative going pulse offered to 128-meter, the "74LS393". The outputs of this counter through a gate buffer presented to the address inputs of RAM, while the LOW of the / RAS signal the counter is clocked into the RAM. But now there must be read or written. The beginning of the I / O cycle is announced to measure the height of the OPREQ. This disables a flip-flop, formed by two NOR's (IC 9) to. The 16-meter now creates its cycle to position 5, then changes the counting cycle, this is now A, B, C, D, E and F. This is done by the high of Output D. This signal is setting the whole thing upside down. The 128-meter gate buffer is disabled. Instead, the address lines the address bus offered. This is done in two batches. The lowest 7 News be passed at the counter B and C (/ AL = 0), Address lines A7 through A13 over the counter D and E (/ AH = 0). In transition from B to C, the / RAS low, so the addresses listed clocked on the rows in the RAM. The transition from D to E is one of the / CAS are low. These are n.l. split into two separate / CAS'sen, one for each block. They are selected by the bank selection. A / CAS low, as R / W low (write) data from the put in the memory data bus. Is the R / W PAGE 18------------------------------------------------------------------- high (read) then the data from memory to the layer of output D (16-meter) clocked into the D-latch flip-flops (IC 4). This disappears in the bus when asked to do here. The low from D also means that the (NOR) flip-flop is converted and the 16-meter gepreset in position 2. This is the I / O cycle completed and begins again refreshing. The counter will count back 2, 3, 4, 5, 2, 3, 4, ... etc. and get back the 128-meter pulses and resumes where he came, while the address bus-gates were gedisabled are. 8K D.R.A.M. ----------- The above can also print, after surgery, serve as 8K dynamic RAM board. If memory ICs slices than typing "4096" is used be. In these ICs, the 13 pins as chip-select. These are used to the set of 8 ICs (total 4K) mode. This is no longer with the / CAS signal, as in the 32K version. The / CS from the IC's 18 to 25 are going to pin 8 of IC 8, whereas the / CS from the IC's 26 to 33 to pin 8 of IC 12 is. All / CAS'sen of memory ICs are now parallel. The bank selection is deleted. The DIL switches are now used this as address decoding for each block of 8 IC's four switches. Each block can now address the entire file of 32K be put at each place. Tired to be parallel to that ROM, RAM is geschakelt. Sk 1 / 5 switches address line 12, Sk 2 / 6 address lines 13, Sk 3 / 7 address line 14 and Sk with 4 / 8 on the block can be disabled. The practical changes are listed in the table, the points print including stops are scheduled to be declared as follows: --- X ---. Total 12 pieces. By the various compounds can best wire laid on the underside of the PCB. Other systems / processors -------------------------- In other systems, which use 16 address lines and of course there is likely not a bank, the bank select inputs used to be e.g. address line 15 to select or any other select lines. To use this board to address lower address than $ 4000 the address line 14-INVERTING you are, this can be done with a unused NOR gate in the IC 16. Also one must take into account the fact that an I / O refresh cycle 10 clock pulses lasts. Furthermore, it should also observe the following: would the 8 Mc. refreshingklok involvement of a separate oscillator can then problems occur because the refreshing is not synchronized with the uP clock. Experience has shown that an approximately 2 nF capacitor between IC 1 pin 9 and ground the problem. The print is designed to use MKM 100 volts nF/100 capacitors, 250 volt mechanical types are actually too big. There closures may occur between the side of the capacitors and below current traces, especially when using 250 volt types. Also IC should be viewed with caution feet on the bottom if they do not parts that could result from electrical traces between two pins completed. The ontkoppelelko tantaaltypen programs should ideally have at least 16 volt operating voltage. Frank Philipse Ben Postema © 1981 PAGE 19------------------------------------------------------------------- [Schematics] PAGE 20------------------------------------------------------------------- [Schematics] PAGE 21------------------------------------------------------------------- [Schematics] PAGE 22------------------------------------------------------------------- [Schematics] PAGE 23------------------------------------------------------------------- [Schematics] PAGE 24------------------------------------------------------------------- The MDCR (Mini Digital Cassette Recorder). The MDCR is a recorder for storing digital information on a cssette. The serial inforatie is put on the tape with a speed of 6000 baud. That is, 600 bits per second or 750 bytes per seconds. The information is in blocks of 256 bytes on the awning put and there can be 128 units on each side of a cassette. The flushing time The cassette is similar to the reading time (playback time) and more than 90 seconds. Between the blocks on the tape is a space left open the recorder possible to stop every block. Each block is preceded by a block number to MDCR program knows where he is. When writing (Recording) stops the tape and always block because the block number remains stand. Would repeatedly block number would be written in over time to shift too much towards the original position. The tape begins with an S is empty, then the first block number (00), 75mS then empty, then the first block, then 275mS empty, the second block number (01), then 75mS empty, then the second block, etc. .. MDCR program works with hexadecimal numbers, so the blocks are so numbered. From 00 to 7F. (0 to 127.) Time between the block numbers is 700ms. This time 128 plus at the beginning of the 1 S empty cartridge lasts 90.6 seconds together. By a cap from the cartridge to get, which occurs with a tape deleted. Instructions for the MDCR from the monitor. The T command of the monitor is identical to the command 1UU. (See Monitor description.) That means when the monitor encounters a T he goes to the MDCR program. For each command for the MDCR must a T stand. The commands are: CAT catalog Run Run REW rewind Save SAVE LOAD load LOCK Lock DELETE delete RENAME rename INIT Initialize INIT: This command is sure to initialize a new cartridge. When this is done, the tape with the blocks and block numbers are set with zeros. The block numbers are to 700ms on the tape put to the end of the tape is reached. There are always 80 (128) put blocks on the tape. So if the tape is longer than 90 S (Normally about 96 S) after block number 80 (128) between the block numbers No more writing block. This command is never run with a cassette where there is valuable information! Of course, do use INIT are all data from a tape erase. PAGE 25------------------------------------------------------------------- CAT: This is an overview of what's on a cassette is in the image put. This occurs in 8 columns. The le, the program numbers (1 to 16 decimal). The second names of the programs, the third memory address where the program is intended to be, the fourth the length of the program, the fifth gives the block number of the tape where the program state (this is increased to 80 if it is locked), the sixth is the language identifier, the seventh, the memory bank where the program belongs and the eighth is to be used for various applications. SAVE: This is used for a program that has been stored on the Cassette writing. From the monitor e.g.: TSAVE STORY 4000 800 L2 Q1 The T tells the monitor that something should be done with the MDCR. SAVE MDCR tells the program that something needs to be put on tape. Then the name must be typed on what needs to be put on tape. This name up to 8 characters run together. After the name should follow a space to indicate where the name ends. Then comes the start address of the program followed up on tape by the length. Both these may vary from 0 to 7FFF. Now there three things to be added. If not, then take the MDCR program that they are 00. These three things are an L for language, Q for a bank and an S for use as cultivation, each followed by a number between 1 and FF and a space. Are your program in Q1 as In the example, it should be mentioned, otherwise very different information put ape. (For details see monitor and editor description.) The L (language) indicates what kind of information on tape is put. Preliminary determination: 00 Miscellaneous January 2650 machintaal execute with starting address is address 02 gwone text 03 basic codes without special keyword 04 Loteling programs The example is a piece of text called STORY commencing Address 4000, 800 bytes long and in a state bank. (Note: all hexadecimal.) It can not at once a piece of text to be put on tape in two or more benches. That should also be two or more times tape be put. Is given a name already on the tape, then there is to the other data are no longer considered and the data on the tape are used. Is that however desirable it must rename used or the old program must first erase the tape be. (See DELETE.) The SAVE command works in the latter case if the program on tape is actually already been locked. (See LOCK.) PAGE 24------------------------------------------------------------------- The MDCR (Mini Digital Cassette Recorder). The MDCR is a recorder for storing digital information on a cssette. The serial inforatie is put on the tape with a speed of 6000 baud. That is, 600 bits per second or 750 bytes per seconds. The information is in blocks of 256 bytes on the awning put and there can be 128 units on each side of a cassette. The flushing time The cassette is similar to the reading time (playback time) and more than 90 seconds. Between the blocks on the tape is a space left open the recorder possible to stop every block. Each block is preceded by a block number to MDCR program knows where he is. When writing (Recording) stops the tape and always block because the block number remains stand. Would repeatedly block number would be written in over time to shift too much towards the original position. The tape begins with an S is empty, then the first block number (00), 75mS then empty, then the first block, then 275mS empty, the second block number (01), then 75mS empty, then the second block, etc. .. MDCR program works with hexadecimal numbers, so the blocks are so numbered. From 00 to 7F. (0 to 127.) Time between the block numbers is 700ms. This time 128 plus at the beginning of the 1 S empty cartridge lasts 90.6 seconds together. By a cap from the cartridge to get, which occurs with a tape deleted. Instructions for the MDCR from the monitor. The T command of the monitor is identical to the command 1UU. (See Monitor description.) That means when the monitor encounters a T he goes to the MDCR program. For each command for the MDCR must a T stand. The commands are: CAT catalog Run Run REW rewind Save SAVE LOAD load LOCK Lock DELETE delete RENAME rename INIT Initialize INIT: This command is sure to initialize a new cartridge. When this is done, the tape with the blocks and block numbers are set with zeros. The block numbers are to 700ms on the tape put to the end of the tape is reached. There are always 80 (128) put blocks on the tape. So if the tape is longer than 90 S (Normally about 96 S) after block number 80 (128) between the block numbers No more writing block. This command is never run with a cassette where there is valuable information! Of course, do use INIT are all data from a tape erase. PAGE 25------------------------------------------------------------------- CAT: This is an overview of what's on a cassette is in the image put. This occurs in 8 columns. The le, the program numbers (1 to 16 decimal). The second names of the programs, the third memory address where the program is intended to be, the fourth the length of the program, the fifth gives the block number of the tape where the program state (this is increased to 80 if it is locked), the sixth is the language identifier, the seventh, the memory bank where the program belongs and the eighth is to be used for various applications. SAVE: This is used for a program that has been stored on the Cassette writing. From the monitor e.g.: TSAVE STORY 4000 800 L2 Q1 The T tells the monitor that something should be done with the MDCR. SAVE MDCR tells the program that something needs to be put on tape. Then the name must be typed on what needs to be put on tape. This name up to 8 characters run together. After the name should follow a space to indicate where the name ends. Then comes the start address of the program followed up on tape by the length. Both these may vary from 0 to 7FFF. Now there three things to be added. If not, then take the MDCR program that they are 00. These three things are an L for language, Q for a bank and an S for use as cultivation, each followed by a number between 1 and FF and a space. Are your program in Q1 as In the example, it should be mentioned, otherwise very different information put ape. (For details see monitor and editor description.) The L (language) indicates what kind of information on tape is put. Preliminary determination: 00 Miscellaneous January 2650 machintaal execute with starting address is address 02 gwone text 03 basic codes without special keyword 04 Loteling programs The example is a piece of text called STORY commencing Address 4000, 800 bytes long and in a state bank. (Note: all hexadecimal.) It can not at once a piece of text to be put on tape in two or more benches. That should also be two or more times tape be put. Is given a name already on the tape, then there is to the other data are no longer considered and the data on the tape are used. Is that however desirable it must rename used or the old program must first erase the tape be. (See DELETE.) The SAVE command works in the latter case if the program on tape is actually already been locked. (See LOCK.) PAGE 26------------------------------------------------------------------- LOAD: This command is to make something of the cassette in memory string. e.g.: TLOAD STORY Further details are unnecessary because all information on the tape present the information exactly to put back into the geheuen as it said. RUN: This can only be used when a program in 2650 machine language was written to save and L1 is specified, e.g.: Trun PROGRAM We will continue the program of the tape in the heheugen put, then the program is runned directly. DELETE: This is a program that is not desirable to erase the tape, e.g.: TDELETE STORY This command does not work if the text is locked. (See LOCK.) RENAME: When a name an a program on the tape is changed may be that RENAME, e.g.: TRENAME STORY STORY In the first block on the tape this is only the name changed. The rest of the data bodies simply maintained. This command does not work If the tape is locked. (See LOCK.) LOCK: This command is to ensure that no one program on tape can be changed, e.g.: TLOCK STORY Now in the first block on the tape in the catalog for the program on a bit is set. (The 7th bit of the byte first block number.) This has a few commands that are useful a program may change to no longer use that program. These are: SAVE, DELETE, and RENAME. Because it is a software lock is still possible, as experiments go wrong, but at the MDCR Clear is put. To prevent this, it is highly recommended that a man cassette with a cap in it not to if this does MDCR working. UNLOCK: This is a command that a lock of a program on tape lifts, eg: TUNLOCK STORY PAGE 27------------------------------------------------------------------- REW: This stands for rewind or rewind, e.g.: TREN It is recommended to store the cassette when the tape has not been rewound. This is because there by animals causes (mechanical above) important information can be lost. There are few honors commands execution after automatic rewind. These are: CAT, Lock, UNLOCK, DELETE and RENAME. The monitor has a buffer of 255 characters inutes. This has helped it possible for some commands to type in a row, after which they will respectively uitgeoerd be e.g.: TSAVE STORY 4000 800 L2 Q1 TLOCK STORY TCAT After a return is erst the document text that is put on tape in a bank from 4000 to 47FF. Then the gelocke and then displays the custom content list on the screen. After CAT is to tape automatically rewinds. ERRORS: READ ERROR: Appears when something is not on the tape. E.g. as a bit is misread (drop out) than a checksum is not correct and Tape stop reading. CASS ERROR: If the tape for some reason stops or freezes running for end of the tape is reached, this error. Even as Rinse the tape from the recorder is removed. INPUT ERROR: Appears when the program MDCR the stitched data understands. ERROR TOO LONG: On a cassette can not be put more than 31 3/4K. When attempting CROSSING appear this error. NOT ON TAPE ERROR: If after a load, lock, unlock, delete or rename a name that could not occur on the tape, this program obviously not treated. CAT FULL ERROR: Up to 16 different programs on a cassette stored. If this is exceeded, then follow this error. PAGE 28------------------------------------------------------------------- LANGUAGE ERROR: If a RUN command is given and the language code associated with that program is not 01, the program will not be runned as assumed that it is not 2650 machine language is concerned. LOCKED ERROR: When a program is locked, the program by MDCR removed or changed. (See LOCK). However, this tried this error will appear. PROTECTED WRITE ERROR: This is a message that appears if there is something on the tape should be changed or added, while the tape is not zoorzien of a cap (top left in the cassette). Still needs to be mentioned that at the time that the MDCR program is read and the cassette is taken from the recorder, then follows no error. MDCR The program waits for the next bit. When this happens, reset or a tape (without cap) into the recorder then places a read error follows. It is also necessary that when a load or run command Now, first ee cat can be made if this is what he first made after inserting the tape. The data on the programs are two ways: by not first load and run the tape removed and may so that the data from another tape still in memory stand. If so there will usually not on a tape error appear, unless the same last name on the tape and it was also very likely wrong information from the tape in the memory is put. If there are programs from a cassette be achieved with the delete rest of the programs are not automatically inserted, so everything neat row on the tape. So there will be a hole of a certain amount of blocks. When the savings of a program exploring the The first hole is large enough for the amount of information. If one wants still everything aaneenslitend on the tape, you agree that pre- back, watch the block numbers, the programs to delete and re- save. PAGE 29------------------------------------------------------------------- Mini Digital Cassette Recorder - - - - Phunsy Format (1981) The cassette is arranged so that 128 blocks of 256 bytes per side ascend it. The Playtime is over 90 s per side and that comes down to 700ms per block. At the beginning of the tape is an S obgebruikt left. Then follow to a bloknummr 700ms. The first block number is 00 and there is numbered in sequence to the end of the tape. The blocks 00 to 7F are used and the blocks on the tape afterwards are not. These are usually about ten. At initialization, the block numbers on the tape and put behind each block number from 00 to 7F is a block put fully written with zeros. Behind the remaining block numbers are not written. Before and after each block number is AA (hex). A data block begins with AA, then a checksum, then the data (256 bytes) and ends et AA again. Schematic: [Diagram] After each block is about 275mS space to stop. When write to tape n.l. the block numbers are not re-written as otherwise the block numbers to shift. The bytes are written to tape, starting with bit 0. The checksum is the sum of the next data block of 256 bytes without anything to carry to do. PAGE 30------------------------------------------------------------------- The first block (00) is used for the catalog. This may data for 16 different programs are stored. The first half of the block has two functions. From byte 00 to 7F is bit 7 of each byte is used to indicate in which state and block information any block. Byte 00 Bit 7 in block 00 and so on until bit 7 for byte 7F 7F block. Bit 0 to 6 of these bytes are used to program names to store. Any name can be 8 bytes long, so there might be 16 names in that just with 7-bit ascii guarantee. Byte 00 to 07 for the first name, 08 to 0F for the second etc. .. The second half of the block contains the remaining information. Byte 80 through 87 for a program, 88 to 8F for program 2, etc. and as Last F8 to FF program for 1916. For each program is 8 bytes. The first byte is the start address, lower order. The second byte is the start address higher order. The third byte is the length, lower order. The fourth byte is the length, higher order. The fifth byte has two functions. In bits 0 to 6 shows which The first block of a given program. One is progrogramma Always put in consecutive blocks. The seventh bit of the fifth byte used as a software lock. This bit is written in Jan. 1 it can program is not changed or overwritten. Is this a 0 then that though. The sixth byte indicates the language of the program (or text or whatever). In this respect is still not entirely certain how, but for now it is as follows. Bit 4 to 7 provide for the processor. 0 to 2650, 1 for 6502, 2 for 6800, etc. .. This is just one example, however the 2650 is it already in use. Bit 0 to 3 for the type of program. 0 for miscellaneous, 1 for machine language, 2 for ordinary text, 3 for BASIC, 5 for assembler source code, etc. .. The seventh byte is an extra address byte. It can be used for bank account numbers, as the phunsy done, but can also as an extra byte at the start address when working with a micro measurement that memory address. Finally the eighth byte is used to indicate the number of the part of a program this is and how many parts it exists. There may n.l. most programs are much longer than 32K, or programs who for some reason a lot of weight can be overridden. Bit 0 to 3 indicates the number of the part and bits 4 to 7 indicates how many share the program exists. Thus a program is in 16 parts exist. Is there in this 00-byte, there is no more parts. This then corresponds to 11. Is there e.g. 53 than it is the third of five parts. PAGE 31------------------------------------------------------------------- [Schematic] END OF DOCUMENT-----------------------------------------------------------